Japanese automaker Honda Motor and semiconductor firm Renesas Electronics have signed an agreement to develop a system-on-chip (SoC) series for software-defined vehicles (SDVs), including Honda’s new 0 Series EVs.
The new SoC is designed for performance of 2,000 TOPS and power efficiency of 20 TOPS/W. It is planned for use in future models of the Honda 0 Series that will be launched in the late 2020s.
The Series will adopt a centralized electrical and electronics (E/E) architecture that combines multiple electronic control units (ECUs) responsible for controlling vehicle functions into a single ECU. The core ECU, which serves as the heart of the SDV, manages essential vehicle functions such as advanced driver assistance systems (ADAS) and automated driving (AD), powertrain control and comfort features, all on a single ECU. The ECU requires a SoC that provides higher processing performance than traditional systems, while minimizing any increase in power consumption.
Using Taiwanese semiconductor foundry TSMC’s leading-edge 3 nm automotive process technology, the SoC can reduce power consumption while using multi-die chiplet technology to combine Renesas’s generic fifth-generation R-Car X5 SoC series with an AI accelerator optimized for AI software developed by Honda.
Source: Renesas Electronics
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