onsemi has launched the Elite Pairing Studio, a cloud-based design environment that helps engineers find and evaluate matched combinations of SiC MOSFETs and gate drivers before committing to a full system-level simulation.
Getting the SiC MOSFET and gate driver pairing right matters more than it might seem. The gate driver’s output current, timing and voltage levels directly shape the switching waveform, which determines switching losses, voltage overshoot relative to device ratings and EMI behavior. A poor pairing can push those parameters out of bounds even if each device individually looks fine on paper.
Traditionally, working that out required iterating through datasheets, running spreadsheet calculations and building test circuits. The Elite Pairing Studio is built around onsemi’s own device portfolio and runs those evaluations automatically, outputting switching timings, gate voltage and current waveforms, voltage overshoot margins and turn-on/turn-off energy losses through an interactive waveform viewer. The underlying calculation methods are transparent and inspectable, based on established industry equations rather than black-box simulation.
The tool is the entry point to onsemi’s broader simulation stack. Engineers can take the pairing they’ve selected and export PLECS-compatible system-level models to carry the analysis forward into onsemi’s Elite Power Simulator for full efficiency, thermal and loss evaluation. onsemi says additional device technologies will be added to the Studio in the future.
Target applications include EV traction inverters, onboard chargers, AI data center power supplies and industrial motor drives.
Source: onsemi
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